Component Design Engineer jobs - Redwood City, CA

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Apr 21 User Experience Design Engineer Intern - 2nd Yr Complete HP Palo Alto, CA

As a User Experience design Intern, you will work with a team of talented Software ... would have exposure to user experience design and mock development. PHP skills is a plus. more

Apr 17 Design Verification Engineer Intern Altera San Jose, CA

As a Design Verification Engineer Intern, you will be responsible for verification of next ... skills. Experience in verilog RTL design, verification, VCS Verilog simulator,... more

Apr 09 Design Engineer Intern AMI Semiconductor Santa Clara, CA

Design Engineer Intern Use your Linkedin Profile to help you apply faster!Job ID ... Experience 0-2 yearsPosition DescriptionThe design engineer intern will be responsible... more

Apr 09 Design Engineering Intern Rambus Sunnyvale, CA

Design Engineering InternJob ID 2724Division InternshipsJob Location U.S. - Sunnyvale, ... digital logic design or circuit design; must be currently enrolled in an academic... more

Feb 20 Components Research Intern - Summer 2014 Intel Santa Clara, CA

semiconductor processing, integration and/or design. Qualifications Candidates must be enrolled in a PhD track graduate program in one of the following degree specialties :... more

Feb 19 Intern, Associate Design Engineer Space Systems/loral Palo Alto, CA

and execution of engineering design changes. • Records and reports work ... components and systems. • Proficient in the use of computer-aided design tools. Move... more

Jan 03 Intern - ASIC Design - Engineer Seagate Santa Clara, CA

in Santa Clara, CA and reports to an ASIC Design Manager in Seagate's VLSI development ... Digital logic design, simulation, synthesis, and timing closure using Verilog/System Veril... more

Dec 27 Product Design Engineer Intern Amazon Cupertino, CA

The Role: As a Product Design Engineer Intern, you will demonstrate a strong working ... materials * Demonstrated design experience integrating component modules (I/O,... more

Sep 01 Design and Usability Engineer - Intern Elliptic Labs Palo Alto, CA

supervision of the CTO & VP Engineering to design, and develop the presentation layers ... and module definitions to yield design and layout of major components. Works... more

Aug 18 Analog/Mixed Signal Design Engineering Intern Maxim Integrated Products San Jose, CA

understanding of transistor level design • Strong written and verbal communication skills • Ability to write behavioral models for both and analog and digital... more

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