Senior Verification Engineer jobs

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Apr 18 Sr. Design Verification Engineer-paid relo to Austin, TX-bzs6433 Recruiting Firm El Paso, TX

include but are not limited to verification planning testbench development ... test to support both pre silicon verification and post silicon validation... more


to have a real impact. Principal ASIC Verification Engineer (Mountain View, CA., ... senior to principal level, ASIC functional verification engineer. Responsible for the... more

Apr 15 Senior Design Verification Engineer - UVM Kforce Inc. Austin, TX

for complex Mixed-Signal ICs. This Senior Engineer will work in a ... functionality* Work independently* Develop verification plans* Implement verification... more

Apr 01 Senior IC Design/Verification Engineer Atmel San Jose, CA

Senior IC DesignVerification Engineer San Jose, CA USA Atmel Corporation (Nasdaq ATML) is ... Work with digital designers and verification engineers to design and test... more

Mar 27 Senior Verification and Validation Engineer (065117) Philips Monroeville, PA

Great innovations start with the people that are passionate and skilled enough to create them. As a diversified health and well-being company, Philips focuses on improving... more

Mar 20 Senior & Principal Asic Verification Engineers Job Juncture Irvine, CA

to have a real impact. Principal ASIC Verification Engineer (Mountain View, CA., ... senior to principal level, ASIC functional verification engineer.Responsible for the... more

Jan 25 Senior Human Factors/Verification & Validation Engineer Bayer Indianola, PA

The primary purpose of this role, Senior Human Factors/Verifications & Validation Engineer ... factors/usability engineering, verification and validation processes;•Actively assess... more

Dec 10 Sr Architect - Verification Acceleration Cadence Design Systems San Jose, CA

senior R&D architect to help develop verification acceleration technology. The senior architect will lead a small team of highly experienced individuals in developing behavioral... more

Dec 10 Sr. Verification Engineer Cadence Design Systems San Jose, CA

This position is for a Senior Verification Engineer in the Silicon development group at ... familiarity of constrained random verification methodology. - Knowledge and... more

Oct 17 SR Digital Design & Verification Engineer - jm7213 Imaging Sensors Palo Alto, CA

JM7213 Engineer, Digital Design & Verification Location:Palo Alto, CA Local candidates ... experience with RTL coding in Verilog, verification, validation, synthesis, timing... more

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