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Mar 14 Intern - ASIC Design - Engineer Seagate Santa Clara, CA

Verilog and ASIC design tools such as Synopsys. * Programming in C/C++. * Object oriented programming in an ASIC development environment. * Firmware programming. * Scripting in... more

Feb 06 Staff Digital Hardware Design Engineer Xilinx San Jose, CA

industry-standard EDA tools from Cadence, Synopsys or Mentor * Simulation experience with Cadence IES and experience building block level verification suites * Understanding of... more

Dec 13 Senior CAD Verification PDS Technical Services Santa Clara, CA

in Verilog Experienced with Synopsys VCS, NC-Verilog or Modelsim Scripting in Perl or TCL or Python Prior customer support experience Hardware language - VHDL Debussy or... more

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